Wafer testing systems typically include a test head and a probe card. Packaged part testing systems typically include a test head and a dut board. The probe card or dut board includes a pattern of contacts for electrically probing or connecting to portions of an integrated circuit. The test head is configured to drive various contacts of the probe card or dut board to carry out particular test procedures within the integrated circuit. In the course of a test procedure, the test head receives output signals from the integrated circuit via the contacts of the probe card or dut board. The output signals are indicative of electrical characteristics of the integrated circuit under test. The probe card or dut board and the test head are uniquely configured for a particular integrated circuit and, in some cases, a particular test procedure. Accordingly, the probe card or dut board and/or the test head must be changed for different integrated circuits and test procedures.
The test head is electrically coupled to the probe card or dut board with a coupling apparatus (i.e., interface apparatus) often referred to as a “pogo” unit. The pogo unit engages the test head, or some intermediate coupling structure associated with the test head, and the probe card or dut board. The pogo unit includes an array of spring-loaded contacts referred to as pogo pins. The pogo pins act as signal and ground conductors, and are arranged to electrically couple contacts on the probe card or dut board to corresponding contacts on the test head. The spring force of the pogo pins helps to maintain uniformity of electrical contact between the various contacts of the probe card or dut board and the test head. When the test head and probe card or dut board are engaged with the pogo unit exerting pressure against the pogo pins, the pogo pins respond with a spring force that enhances coupling pressure. The resilience of the pins generally ensures adequate coupling pressure despite planar deformation of the test head or the probe card or dut board during a test procedure.
In many applications, the conductors are required to carry signals having very high frequency components, from 100's of MHz to 10 GHz in the near future and to 10's of GHz in the more distant future. Accordingly, the transmission line characteristic impedance, Z, of the signal path between the probe card or dut board and the test head is of prime interest. For optimal signal transfer between the test electronics and the device being tested, the characteristic impedance of all elements in the signal path should be closely matched. Usually, it is desired that all signal paths have the same impedance, for example 28, 50, or 75 Ohms, though it may be required that several different values of characteristic impedance be provided in the same interface.